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Maxim > 方案 > 电信线卡：T1、E1、J1

单芯片收发器：组合了T1、E1、J1

数据资料
显示 标题/型号 关键优势
QV  PDF 单/双/四/八通道TDM-Over-Packet传输器件
DS34S101, DS34S102, DS34S104, DS34S108

通过伪线提供TDM服务(TDMoP)，尺寸最小、最可靠、成本最低的方案选择
QV  PDF 集成了VCXO的高精度时钟发生器
MAX9450, MAX9451, MAX9452

首款SONET时钟发生器, 集成了VCXO和延时电路, 可替代昂贵的VCXO及其外部失效保护电路
QV  PDF 以太网映射器，集成了T1/E1/J1收发器
DS33R11
QV  PDF 单路、T1/E1/J1收发器
DS26521

单端口T1/E1/J1收发器，为T1、E1和J1应用提供单芯片成帧器和LIU
QV  PDF 四路以太网映射器
DS33Z44
QV  PDF T1/E1/J1/64KCC BITS单元
DS26504
QV  PDF 反向多路复用以太网映射器，集成了四路T1/E1/J1收发器
DS33R41

大大简化四路T1或E1传输线传送以太网数据包的设计方案！
QV  PDF DS3/E3单芯片收发器
DS3170
QV  PDF 4端口单元/分组T1/E1/J1收发器
DS26556

具有4端口信元/分组交换的T1/E1/J1单芯片收发器
QV  PDF 四路T1/E1/J1收发器
DS21455, DS21458

业内首款4端口收发器，用于T1、E1、J1标准间的切换，无需外部元件
QV  PDF T1/E1/J1单芯片收发器，TDM/UTOPIA II接口
DS2156, DS2156L, DS2156LN

业内首款T1/E1/J1收发器，用于ATM系统
QV  PDF 四路T1/E1/J1收发器
DS21Q55, DS21Q55N
QV  PDF T1/E1/J1单芯片收发器
DS2155

T1/E1/J1单芯片收发器，为不同规范提供相同的设计方案



Key Specifications:  Clock Generators
Part Number Applications fIN
(MHz)		 fIN
(MHz)		 fOUT
(MHz)		 fOUT
(MHz)		 Fixed or Continuous Frequency Output Levels Out-
puts		 PLLs Program-
mability		 Spread Spectrum Output Jitter
(ps)		 VSUPPLY
(V)		 Package/Pins
min max min max RMS
MAX9451 
Ethernet
Fibre Channel
GSM
SONET/SDH
UMTS
W-CDMA
 0.008 500 15 160 Continuous HSTL 2 1 I2C No 0.8
2.5
3.3
TQFP-EP/32
MAX9450  LVPECL
TQFP-EP/32
MAX9452  LVDS
TQFP-EP/32
See All Clock Generators (27)

Key Specifications:  T/E Carrier & Packetized Products
Part Number Transmission Standard Functions Channels In-to-Out Clocks
(MHz)		 VSUPPLY
(V)		 EV Kit RoHS Available Package/Pins Smallest Available Pckg.
(mm2)
max w/pins
DS26521  T1/E1/J1 Framer + LIU 1 External Master Clock can be a multiple of 1.544 or 2.048 3.3 Yes See Data Sheet
See Data Sheet/
 -
DS33R11 
Ethernet/Serial TDM
T1/E1/J1
 Ethernet Mapper 1 1.544 to 4.096 & 8.192 Yes Yes
PBGA/256
 729
DS33R41 
Ethernet/Serial TDM
T1/E1/J1
 Ethernet Mapper 4 - - Yes
PBGA/400
 729
DS26556  T1/E1/J1 Framer + LIU 4 External Master Clock can be a multiple of 1.544 or 2.048 - See Data Sheet
CSBGA/256
 289
DS33Z44  Ethernet/Serial TDM Ethernet Mapper 4 - Yes Yes
CSBGA/256
TCBGA/256
 -
DS3170  T3/E3 Framer + LIU 1 - Yes Yes
CSBGA/100
 121
DS26504 
64kHz Composite Clock - G.703 Level B
64kHz - G.703 II.1 Japanese 64kHz Clock
64kHz Composite Clock - GR378
64kHz - G.703 II.2 Japanese 6312kHz Clock
64kHz Composite Clock - G.703 Level A
T1/E1/J1
 BITS Element 1
0.008
0.064
1.544
2.048
6.312
19.44
 Yes See Data Sheet
See Data Sheet/
 -
DS21455  T1/E1/J1 Framer + LIU 4 - - Yes
PBGA/256
 729
DS21458  T1/E1/J1 Framer + LIU 4 - Yes Yes
CSBGA/256
 289
DS2156  T1/E1/J1 Framer + LIU 1 External Master Clock can be a multiple of 1.544 or 2.048 Yes Yes
CSBGA/100
LQFP/100
 100
DS2155  T1/E1/J1 Framer + LIU 1 - Yes Yes
CSBGA/100
LQFP/100
 100
See All T/E Carrier & Packetized Products (102)

Key Specifications:  High-Speed Interconnect (Differential Signaling)
Part Number Signal Type Tx VSUPPLY
(V)
Tx
MAX9450  LVPECL 2
2.5
3.3
See All High-Speed Interconnect (Differential Signaling) (133)

Key Specifications:  TDM-Over-Packet
Part Number T1/E1/Serial Streams T3/E3, STS-1 Serial Ports Mapping Methods PSN Encapsulation Protocols 10/100 MAC Interface Processor Interface Package/Pins Smallest Available Pckg.
(mm2)		 RoHS Available
max w/pins
DS34S101  1 1
AAL1
CESoPSN
HDLC
SAToP
Structured
Structured with CAS
TDMoIP
Unstructured
L2TPv3 (IPv4, IPv6)
MEF-8
MPLS
RTP
UDP (IPv4, IPv6)
MII
RMII
SSMII
16-Bit
32-Bit
SPI
CSBGA/256
 289 Yes
DS34S102  2
CSBGA/256
 289
DS34S104  4
CSBGA/256
 289
DS34S108  8
BGA/484
 529
See All TDM-Over-Packet (9)



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