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MAX5264
八通道、14位、电压输出DAC,并行接口,用于ATE


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状态
状况:生产中。

数据资料
完整的数据资料 (PDF, 464kB)
英文 下载数据资料(PDF)下载

概述
The MAX5264 contains eight 14-bit, voltage-output digital-to-analog converters (DACs). On-chip precision output amplifiers provide the voltage outputs. The device operates from +14V/-9V supplies. Its bipolar output voltage swing ranges from +9V to -4V and is achieved with no external components. The MAX5264 has three pairs of differential reference inputs; two of these pairs are connected to two DACs each, and a third pair is connected to four DACs. The references are independently controlled, providing different full-scale output voltages to the respective DACs. The MAX5264 operates within the following voltage ranges: VDD = +7V to +14V, VSS = -5V to -9V, and VCC = +4.75V to +5.25V.

The MAX5264 features double-buffered interface logic with a 14-bit parallel data bus. Each DAC has an input latch and a DAC latch. Data in the DAC latch sets the output voltage. The eight input latches are addressed with three address lines. Data is loaded to the input latch with a single write instruction. An asynchronous load input (active-low LD) transfers data from the input latch to the DAC latch. The active-low LD input controls all DACs; therefore, all DACs can be updated simultaneously by asserting the active-low LD pin. An asynchronous active-low CLR input sets the output of all eight DACs to the respective DUTGND input of the op amp. Note that active-low CLR is a CMOS input, which is powered by VDD. All other logic inputs are TTL/CMOS compatible. The "A" grade of the MAX5264 has a maximum INL of ±4LSBs, while the "B" grade has a maximum INL of ±8LSBs. Both grades are available in 44-pin MQFP packages.

关键特性   应用/使用
  • Full 14-Bit Performance Without Adjustments
  • 8 DACs in a Single Package
  • Buffered Voltage Outputs
  • Unipolar or Bipolar Voltage Swing to +9V and -4V
  • 22µs Output Settling Time
  • Drives Up to 10,000pF Capacitive Load
  • Low Output Glitch: 30mV
  • Low Power Consumption: 10mA (typ)
  • Small 44-Pin MQFP Package
  • Double-Buffered Digital Inputs
  • Asynchronous Load Updates All DACs Simultaneously
  • Asynchronous CLR-bar Forces All DACs to DUTGND Potential

 

Key Specifications:  Precision DACs (12-16 Bits)
Part Number Resolution Bits Channels Output Type Reference INL
(±LSB)
Interface Supply Range
(V)
Supply Range
(V)
Oper. Temp.
(°C)
Price
max min max See Notes
MAX5264A  14 8 Voltage- Buffered Ext. 4 Parallel - Full Word 9 14 0 to +70 -
MAX5264B  8 -
查看所有Precision DACs (12-16 Bits) (235)

图表
MAX5264:功能原理框图
功能原理框图

可靠性报告
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    3. 型号尾缀:T或T&R = 卷带; + = RoHS/无铅; # = RoHS/无铅豁免权。详细信息请参考:完整的数据资料型号命名规则
    4. * “封装代码/变更”提供产品使用的变更信息。注意:型号尾缀中的“+”、“#”和“-”表示器件的RoHS状况,封装图上可能显示不同的尾缀字符。


    器件: 1-4/4

    MAX5264 免费样品 采购 状态
    封装: 类型 引脚 占位面积
      封装图编码/变更 *
    温度 RoHS/无铅?
    材料分析
    MAX5264ACMH  
    Active MQFP;44引脚;181.2mm²
    封装图: 21-0826 (PDF)
    连接盘图形: 90-0169 (PDF)
    使用封装码/变更:M44-7*
    0°C至+70°C RoHS/无铅:
    材料分析
    MAX5264ACMH-T    
    Active

    连接盘图形: 不提供

    0°C至+70°C 参考数据资料
    MAX5264BCMH  
    Active MQFP;44引脚;181.2mm²
    封装图: 21-0826 (PDF)
    连接盘图形: 90-0169 (PDF)
    使用封装码/变更:M44-7*
    0°C至+70°C RoHS/无铅:
    材料分析
    MAX5264BCMH-T    
    Active

    连接盘图形: 不提供

    0°C至+70°C 参考数据资料

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    参考文献: 19-1734; Rev. 0; 2000-08-10
    本页最后一次更新: 2008-09-05


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