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完整的数据资料 (PDF, 952kB) 英文 下载 The MAX3876 is a compact, low-power clock recovery and data retiming IC for 2.488Gbps SDH/SONET applications. The fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input. The data is retimed by the recovered clock. Differential CML outputs are provided for both clock and data signals, and an additional 2.488Gbps serial input is available for system loopback diagnostic testing. The device also includes a TTL-compatible loss-of-lock (active-low LOL) monitor. The MAX3876 is designed for both section-regenerator and terminal-receiver applications in OC-48/STM-16 transmission systems. Its jitter performance exceeds all of the SONET/SDH specifications. This device operates from a +3.3V or +5.0V single supply over a -40°C to +85°C temperature range. Power consumption is typically only 445mW with a +3.3V supply. The MAX3876 is available in a 32-pin TQFP package as well as in die form.

现备有评估板：  MAX3876EVKIT  

关键特性		应用/使用
Exceeds ANSI, ITU, and Bellcore SONET/SDH Regenerator Specifications 440mW Power Dissipation (at +3.3V) Clock Jitter Generation: 3.7mUIRMS +3.3V or +5V Single Power Supply Fully Integrated Clock Recovery and Data Retiming Additional High-Speed Input Facilitates System Loopback Diagnostic Testing Tolerates >2500 Consecutive Identical Digits Loss-of-Lock Indicator Differential CML Data and Clock Outputs		2.488Gbps ATM接收器 上/下路复用器 数字交叉连接 数字视频传输 机架内/子机架互连 SDH/SONET接收器与再生器 SDH/SONET测试设备

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