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MAX108
±5V、1.5Gsps、8位、超高速、ADC,带有片上2.2GHz采样/保持放大器


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状况:生产中。

概述
完整的数据资料 (PDF, 1.3MB)
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The MAX108 PECL-compatible, 1.5Gsps, 8-bit ultra high-speed analog-to-digital converter (ADC) allows accurate digitizing of analog signals with bandwidths to 2.2GHz. Fabricated on Maxim's proprietary advanced GST-2 bipolar process, the MAX108 integrates a high-performance track/hold (T/H) amplifier and a quantizer on a single monolithic die.

The innovative design of the internal T/H, which has an exceptionally wide 2.2GHz full-power input bandwidth, results in high performance (typically 7.5 effective bits) at the Nyquist frequency. A fully differential comparator design and decoding circuitry reduce out-of-sequence code errors (thermometer bubbles or sparkle codes) and provide excellent metastable performance. Unlike other ultra high-speed ADCs that can have errors resulting in false full- or zero-scale outputs, the MAX108 limits the error magnitude to 1 LSB.

The analog input is designed for either differential or single-ended use with a ±250mV input voltage range. Dual, differential, positive-referenced emitter-coupled logic (PECL)-compatible output data paths ensure easy interfacing and include an 8:16 demultiplexer feature that reduces output data rates to one-half the sampling clock rate. The PECL outputs can be operated from any supply between +3V to +5V for compatibility with +3.3V or +5V referenced systems. Control inputs are provided for interleaving additional MAX108 devices to increase the effective system sampling rate.

The MAX108 is packaged in a 25mm x 25mm, 192-contact Enhanced Super Ball-Grid Array (ESBGA™) and is specified over the commercial (0°C to +70°C) temperature range. For pin-compatible, lower speed versions of the MAX108, see the MAX104 (1Gsps) and the MAX106 (600Msps) data sheets.

现备有评估板:  MAX104EVKIT, MAX106EVKIT, MAX108EVKIT  

关键特性   应用/使用
  • 1.5Gsps Conversion Rate
  • 2.2GHz Full-Power Analog Input Bandwidth
  • 7.5 Effective Bits at fIN = 750MHz (Nyquist Frequency)
  • ±0.25 LSB INL and DNL
  • 50Ω Differential Analog Inputs
  • ±250mV Input Signal Range
  • On-Chip, +2.5V Precision Bandgap Voltage Reference
  • Latched, Differential PECL Digital Outputs
  • Selectable 8:16 Demultiplexer
  • Internal Demux Reset Input with Reset Output
  • 192-Contact ESBGA Package
  • Pin Compatible with MAX104 (1Gsps) and MAX106 (600Msps)

 
  • 自动测试设备(ATE)
  • 数字示波器
  • 数字射频/中频信号处理
  • 直接射频下变频器
  • 高能物理
  • 高速数据采集器
  • 雷达/ECM系统

    Key Specifications:  High-Speed ADCs (> 5Msps)
    Part Number Input Chan. Resolution
    (bits)
    Sample Rate
    (Msps)
    AC Specs
    (MHz)
    SFDR
    (dBc)
    ENOB
    (bits)
    SINAD
    (dB)
    SNR
    (dB)
    THD
    (dB)
    INL
    (±LSB)
    DNL
    (±LSB)
    Full Pwr. BW
    (MHz)
    ICC
    (mA)
    Data Bus Interface Smallest Available Pckg.
    (mm2)
    max ≥ @ fIN min min min min min typ max w/pins
    MAX108  1 8 1500 125 61.6 7.71 47.2 47.4 -60.2 0.25 0.25 2200 1078
    µP/8
    Demuxed
    LVPECL
    630
    查看所有High-Speed ADCs (> 5Msps) (77)

    图表
    MAX108:典型工作电路
    典型工作电路

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    参考文献: 19-1492; Rev. 1; 2002-06-21
    本页最后一次更新: 2009-09-18


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