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MAX104
±5V、1Gsps、8位ADC,带有片上2.2GHz采样/保持放大器

业内最佳性能的8位ADC,1Gsps时具有46.2dB SINAD


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概述
完整的数据资料 (PDF, 896kB)
英文 下载数据资料(PDF)下载
The MAX104 PECL-compatible, 1Gsps, 8-bit analog-to-digital converter (ADC) allows accurate digitizing of analog signals with bandwidths to 2.2GHz. Fabricated on Maxim's proprietary advanced GST-2 bipolar process, the MAX104 integrates a high-performance track/hold (T/H) amplifier and a quantizer on a single monolithic die.

The innovative design of the internal T/H, which has an exceptionally wide 2.2GHz full-power input bandwidth, results in high performance (greater than 7.5 effective bits) at the Nyquist frequency. A fully differential comparator design and decoding circuitry reduce out-of-sequence code errors (thermometer bubbles or sparkle codes) and provide excellent metastable performance of one error per 1016 clock cycles. Unlike other ADCs that can have errors resulting in false full- or zero-scale outputs, the MAX104 limits the error magnitude to 1 LSB.

The analog input is designed for either differential or single-ended use with a ±250mV input voltage range. Dual, differential, PECL-compatible output data paths ensure easy interfacing and include an 8:16 demultiplexer feature that reduces output data rates to one-half the sampling clock rate. The PECL outputs can be operated from any supply between +3V to +5V for compatibility with +3.3V or +5V referenced systems. Control inputs are provided for interleaving additional MAX104 devices to increase the effective system sampling rate.

The MAX104 is packaged in a 25mm x 25mm, 192-contact Enhanced Super-Ball Grid Array (ESBGA™) and is specified over the commercial (0°C to +70°C) temperature range.

现备有评估板:  MAX104EVKIT, MAX106EVKIT, MAX108EVKIT  

关键特性   应用/使用
  • 1Gsps Conversion Rate
  • 2.2GHz Full-Power Analog Input Bandwidth
  • > 7.5 Effective Bits at fIN = 500MHz (Nyquist Frequency)
  • ±0.25 LSB INL and DNL
  • 50Ω Differential Analog Inputs
  • ±250mV Input Signal Range
  • On-Chip, +2.5V Precision Bandgap Voltage Reference
  • Latched, Differential PECL Digital Outputs
  • Low Error Rate: 10-16 Metastable States at 1Gsps
  • Selectable 8:16 Demultiplexer
  • Internal Demux Reset Input with Reset Output
  • 192-Contact ESBGA Package

 
  • 自动测试设备(ATE)
  • 数字示波器
  • 数字射频/中频信号处理
  • 直接射频下变频器
  • 高能物理
  • 高速数据采集器
  • 雷达/声纳/ECM系统

    Key Specifications:  High-Speed ADCs (> 5Msps)
    Part Number Input Chan. Resolution
    (bits)
    Sample Rate
    (Msps)
    AC Specs
    (MHz)
    SFDR
    (dBc)
    ENOB
    (bits)
    SINAD
    (dB)
    SNR
    (dB)
    THD
    (dB)
    INL
    (±LSB)
    DNL
    (±LSB)
    Full Pwr. BW
    (MHz)
    ICC
    (mA)
    Data Bus Interface Smallest Available Pckg.
    (mm2)
    max ≥ @ fIN min min min min min typ max w/pins
    MAX104  1 8 1000 500 52.3 7.55 46.2 47 -52.5 0.25 0.25 2200 1078
    µP/8
    Demuxed
    LVPECL
    630
    查看所有High-Speed ADCs (> 5Msps) (77)

    图表
    MAX104:典型工作电路
    典型工作电路

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    参考文献: 19-1459; Rev. 2; 2002-06-20
    本页最后一次更新: 2009-09-07


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