| Pros |
- If properly designed, cannot be disabled from software accidentally.
- Clock source separate from system clock.
- Available with min/max watchdog-timeout period.
- Reset output can be connected to other system ICs that need a reset.
- Monitors one or more power-supply rails (the internal brownout circuit found in some microprocessors is not very accurate).
- Timeout period is fully adjustable by using capacitors.
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- Cost is essentially zero.
- To save debugging information, it can trigger an interrupt before resetting.
- Convenient to use.
- Sometimes a bidirectional reset pin can be connected to other system ICs that need reset.
- Can modify timeout when the processor changes from high speed to low speed or sleep mode.
- Watchdog timeout period can vary less with temperature.
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| Cons |
- Requires some cost to implement.
- Timeout period over temperature can vary substantially.
- Requires one microprocessor I/O line.
- Timeout must be calculated to match both high-speed and low-speed clock modes, due to microprocessor power-save feature.
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- Almost all can be disabled by software (thus, not as reliable).
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